Latest News
Dr. Chun Wang won Seiichi Tejima Research Award.
Congratulations! Dr. Chun Wang won Seiichi Tejima Research Award.
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ISSCC 2025
Eveninig Panel: “Future of Analog Design: Still Magical or Mostly Digital?”
Forum: Wireless Communication Technology for Space Applications: From Satellite to Dish and Smartphones
Kenichi Okada, Institute of Science Tokyo, Tokyo, Japan
“Foldable Phased-Array Transceivers for Satellite Communications”
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Dr. Xu Dingxin won IEEE SSCS Predoctoral Achievement Award
Congratulations! Dr. Xu Dingxin won IEEE SSCS Predoctoral Achievement Award
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Innovative Design Techniques for Better Performance of Wireless Transmitters
Three innovative design techniques substantially enhance wireless transmitter performance and can boost power efficiency and elevate data rates concurrently, as reported by the researchers from Science Tokyo, Japan. This effectively aligns with the growing demand for speed and efficiency, accelerating the widespread deployment of wireless devices. This enables synergistic operation of wireless electronic devices and better quality of modern life.
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ISSCC 2025, 6 presentations
Presentations in ISSCC 2025
Forum Presentation
Kenichi Okada, “Foldable Phased-Array Transceivers for Satellite Communications” Regular Session
Yuncheng Zhang, et al.,“A Power-Efficient CORDIC-less Digital Polar Transmitter Using 1b DSM-Based PA Supporting 256-QAM” Sena Kato, et al.,“A 256-Element Ka-Band CMOS Phased-Array Receiver Using Switch-Type Quadrature-Hybrid-First Architecture for Small Satellite Constellations” (Shirane Lab) Yudai Yamazaki, Minzhe Tang, Daxu Zhang will present their work in Student Research Preview.
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Prof. Hua Wang
Prof. Hua Wang (ETH) visited our lab at Nov. 22th, 2024! Welcome!!!
Speaker: Prof. Hua Wang (ETH, Zurich, Swiss)
Title: “Fundamentals of RF and mm-Wave Power Amplifier Designs”
Abstract: This talk presents a focused overview of mm-wave power-amplifier (PA) designs in silicon, including design fundamentals, advanced PA architectures, and state-of-the-art design examples. As phased arrays and MIMO systems have become ubiquitous in various wireless communication and sensing applications, they pose a completely new level of system complexity and different and often tighter requirements on the wireless frontend electronics, in particular the PAs. The talk will start with an introduction of PA performance metrics and their impacts on wireless systems. Next, it presents the design fundamentals of PA active devices and passive networks as well as power combining strategies. The tutorial discusses advanced PA architectures, including Doherty, Outphasing, LMBA, and Coupler-Balun Doherty PAs, for high efficiency, linearity, and bandwidth. Further, advance and challenges of high mm-Wave PAs in large-scaled arrays will be covered to address various emerging wireless applications. Finally, the talk will conclude with several state-of-the-art mm-wave PA design examples.
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Top Contributors of A-SSCC 2005-2023
Prof. Matsuzawa and Prof. Okada are selected as top contributors of A-SSCC 2005-2023.
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Demonstration of D-band Transceiver at EuMW
Demonstration of D-band Transceiver at EuMW!!
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OB
A great OB, working in NVIDIA, USA, visited our lab!!
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OB/OG Party
Alumni Party!
If you do not receive OB/OG ML, please contact secretaryssc.pe.titech.ac.jp !
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Prof. Patrick Mercier
On July 25, 2024, Okada Lab welcomed Professor Patrick Mercier from the University of California, San Diego (UCSD). He visited the lab and delivered a comprehensive academic presentation to our team.
Speaker: Prof. Patrick P. Mercier, University of California, San Diego (UCSD)
Title: “Low-Power Standards-Compatible Wireless Communications Circuits for Next-Generation IoT and Wearable Applications”
Abstract:
Emerging Internet-of-Things (IoT) devices for use in smart homes, wearable systems, industrial monitoring, smart cities, and beyond all require robust yet low-power wireless communications. Unfortunately, most current wireless standards do not intrinsically support low-power operation due to strict requirements on modulation formats, data rates, linearity, packet overheads, and so on. These restrictions impose minimum power consumption requirements for cellular standards (e.g., GSM, LTE, and 5G) and WiFi, but also surprisingly limit the ability of supposedly low-power standards (e.g., Bluetooth Low Energy and Narrowband-IoT) from reaching new application-enabling power levels.
This presentation will outline the major challenges facing power reduction in modern wireless systems, and will describe several possible solutions to these challenges. Specifically, we will explore the use of wake-up receivers as a means to reduce the power overhead of between-node synchronization. Then, we will discuss an alternative communication scheme that can help to reduce the power of communication in WiFi, BLE, and body-area-network systems by >1,000x through use of standards-compatible backscatter communication systems, including the latest developments incorporating retroreflection and beam steering. We will also discuss related sensing circuit opportunities to round out the application space.
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Hans's Doctoral Thesis Presentation
Hans HERDIAN’s thesis presentation!
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3 presentations in VLSI Symposium
Chenxin Liu, Sena Kato, Yi Zhang presented their work.
IEEE Symposium on VLSI Technology & Circuits
Chenxin Liu “A 640-Gb/s 4x4-MIMO D-Band CMOS Transceiver Chipset” Sena Kato “A 28GHz 5G NR Wirelessly Powered Relay Transceiver Using Rectifier-Type 4th-Order Sub-Harmonic Mixer” Yi Zhang “A 28GHz 4-Stream Time-Division MIMO Phased-Array Receiver Utilizing Nyquist-Rate Fast Beam Switching for 5G and Beyond”
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A Novel 640 Gbps Chipset Paves the Way for Next Generation Wireless Systems
A new D-band CMOS transceiver chipset with 56 GHz signal-chain bandwidth achieves the highest transmission speed of 640 Gbps for a wireless device realized with integrated circuits, as reported by researchers from Tokyo Tech and National Institute of Information and Communications Technology. The proposed chipset is highly promising for the next generation of wireless systems.
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IEICE Best Paper Award
Yudai YAMAZAKI won the IEICE Best Paper Award!
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BEST SEED AWARD
Ms. Anyi Tian has received the BEST SEED AWARD at SSS matching workshop!!
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MCRG Technical Meeting
MCRG Technical Meeting was held. Due to the Corona disaster, it had been 4 years and 3 months since the last face-to-face meeting was held on 2020/1/16. 5/24(Fri) 17:30-18:30 Invited talk @ S4-202 (S422) 環境社会理工学院 笠井 康子先生 「月に行ってテラヘルツ波で観測しよう! TSUKIMI: Lunar Terahertz SUrveyor for KIlometer-scale MappIng」 18:30- ポスターセッション @ S4-203 (S423) Zijie LIANG (Prof. Fukawa lab) Slotted Unsourced Random Access Using Massive MIMO over Frequency Selective Channels Kui WANG (Prof. Sakaguchi lab) Smart Mobility Digital Twin for Automated Driving Futo NODA (Prof. Tran lab) Proposal of LEO based Population Estimation System using Smartphone Emitted WLAN Signals Zhou DERUN (Prof. Takada lab) Prediction of Shadowing Loss of 2D Object by Mirror Kirchhoff Approximation with Unequal Interval Yaxiang WU (Prof. Hirokawa lab) Millimeter-Wave Slot Array Antennas using Gap Waveguides and Perpendicular Corporate-Feed Parallel Plates for Simplified Fabrication Chun WANG (Prof. Okada lab) 300GHz-band 4-Element Amplifier-Last Phased-Array Transmitter
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Prof. Wei Deng and Prof. Xiang Gao
Prof. Wei Deng (SSCS DL, Tsinghua University) and Prof. Xiang Gao (Zhejiang University) visited Tokyo Tech!
5/2(Thu) 15:30-16:30 Prof. Wei Deng (SSCS DL)
“Joint Radar-communication CMOS Transceiver”
16:30-17:30 Prof. Xiang Gao
“Frac-N Sampling PLL with Phase Detection and Quantization Noise Cancellation in a Single Ramp Generation”
★Details of each talk
(Talk 1) Speaker: Prof. Wei Deng (Tsinghua University)
Title: Joint Radar-communication CMOS Transceiver: From System Architecture to Circuit Design
Abstract: Recent years, millimeter-wave and Terahertz radar systems for sensing and radio systems for communication have attracted substantial attention both from the academia and industry. In addition, there is an increasing demanding for fusing both the hardware platform and frequency band of the radar and radio system, which has advantages of energy efficiency, performance optimization, spectrum sharing/efficiency, compact size, interference management, and the overall cost, as compared to assembling of two distinct systems. This lecture will introduce the current and future trends in the emerging joint radar-communication CMOS transceiver from system architecture to circuit design.
Bio: Wei Deng received the B.S. and M.S. degrees from the University of Electronic Science and Technology of China (UESTC), China, in 2006 and 2009, respectively, and the Ph.D. degree from the Tokyo Institute of Technology, Japan, in 2013. He was with Apple Inc., Cupertino, CA, USA, working on RF, mm-wave, and mixed-signal IC design for wireless transceivers and Apple A-series processors. Currently he is with Tsinghua University, Beijing, China, as an Associate Professor. His research interests include RF, mm-wave, terahertz, and mixed-signal integrated circuits and systems for wireless communications, sensing, and imaging systems. He has authored or co-authored more than 160 IEEE journal and conference articles. Dr. Deng is a TPC Member of ISSCC, VLSI, A-SSCC, CICC and ESSCIRC. He has been an Associate Editor and a Guest Editor of the IEEE Solid-State Circuits Letters (SSC-L), a Guest Editor of the IEEE Journal of Solid-state Circuits (JSSC), and a Distinguished Lecturer of the IEEE Solid-State Circuits Society (SSCS).
(Talk 2) Speaker: Prof. Xiang Gao (Zhejiang University)
Title: Frac-N Sampling PLL with Phase Detection and Quantization Noise Cancellation in a Single Ramp Generation
Abstract: Conventional PLLs detecting phase error in the time domain using a phase frequency detector often suffer from poor in-band phase noise due to the limited phase detector (PD) gain. The (Sub-)Sampling PLL is becoming a popular low jitter PLL architecture due to high gain of the SSPD. However, the high gain SSPD has a limited linear detection range, which is a challenge in fractional-N operation with the quantization noise. This talk presents a SPLL design with a merged constant-slope digital-to-time converter(DTC) and sampling phase detector (CSDTC-SPD). It realizes phase detection as well as quantization noise cancellation in a single ramp generation.
Bio: Xiang Gao received the B.E. degree from the Zhejiang University, Hangzhou, China, in 2004 and the M.Sc. and Ph.D. (cum laude) degrees from the University of Twente, Enschede, The Netherlands, in 2006 and 2010 respectively, both in electrical engineering. From 2010 to 2016, he was a principal engineer and design manager with Marvell Semiconductor, Santa Clara, CA, focusing on analog and RF IC design for wireless transceivers.
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Chun Wang's thesis presentation
Chun Wang’s thesis presentation!
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Cherry Blossom Party
Ohanami Party (Cherry Blossom Party)!
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