Research

We have been conducting research on wireless communication systems using the millimeter wave band (30 GHz-300 GHz)¹ for many years. Very wide frequency bandwidths are available in the millimeter-wave band, making it possible to realize ultra-high-speed wireless communications. Compound semiconductors have conventionally been used for millimeter-wave band wireless devices, providing high performance but posing challenges due to their high cost.

To utilize millimeter-wave wireless communication in consumer devices such as smartphones, cost-effective implementation using CMOS integrated circuits capable of mass production has become essential. CMOS integrated circuits, which have been primarily developed for digital circuits, have inferior high-frequency characteristics compared to compound semiconductors. Our laboratory is working to overcome these challenges through innovative circuit design approaches and various circuit enhancement techniques.

In addition to CMOS integrated circuit (IC) design, we perform design and measurements for real applications, including antenna design, packaging, printed circuit board, and control system design, and over-the-air (OTA) measurements. We have achieved performance in CMOS integrated circuits that is superior to compound semiconductors.

Millimeter-wave wireless communication technology, which we have been researching for years, has been commercialized on a large scale as the 5th generation mobile communication system (5G), and we are now conducting research and development to further advance this technology.

Active phased-array antenna technology is essential for the effective utilization of millimeter waves. For future wireless communication technologies such as 6G and 7G, we are working on further speed improvements through millimeter-wave MIMO, high-precision beam control through self-compensation techniques, ultra-fast beam control, power efficiency, cost-reducing technologies in testing, and more.

[achivement]

• New and Improved Multi-Band Operational Receiver for 5G New Radio Communication ( JSSC) ( ISSCC)

• Introducing a Transceiver that Can Tap into the Higher Frequency Bands of 5G Networks ( JSSC) ()

• Researchers develop a compact 28-GHz transceiver supporting dual-polarized MIMO ( JSSC) ()

• A more accurate, low-cost 39 GHz beamforming transceiver for 5G communications ( JSSC) ()

• Gearing up for 5G: A miniature, low-cost transceiver for fast, reliable communications ( JSSC) ( ISSCC)

• New 28-GHz transceiver paves the way for future 5G devices ( JSSC) ()

The 60 GHz band offers an extremely wide frequency bandwidth of up to 14 GHz from 57 GHz to 71 GHz. When used for communication with 256QAM modulation, it can theoretically achieve a data rate of more than 80Gbps. Furthermore, when combined with MIMO technology, a data rate of over 300 Gbps can be achieved.

It is expected to be used as a high-speed, next-generation WiFi technology.

[achivement]

• Tokyo Tech, Sony, JRC and KDDI Labs have jointly developed a 40 GHz and 60 GHz wave-based high-throughput wireless access network

• 28Gb/s wireless data rate achieved with millimeter-wave transceiver ( ISSCC)
  ( JSSC) ( ISSCC) (achieve 42Gbps)
  ( JSSC) ( ISSCC) (achieve 50Gbps)

• Innovative technology to recover performance of CMOS devices damaged by hot carrier injection ( ISSCC)

• Sony and Tokyo Tech Jointly Develop Low-power LSIs for Wideband Millimeter-wave Wireless Communications that … ( JSSC) ( ISSCC)

• World First 16QAM by CMOS Direct-conversion Transceiver ( JSSC) ( ISSCC)

Our laboratory is working on wireless communication and imaging technologies using the terahertz (THz) band, which is an even higher frequency band than millimeter waves.

While 5G mainly uses the frequency band below 100 GHz, the use of the terahertz band above 100 GHz (100 GHz-10 THz)² is being considered for 6G, where even higher speeds are expected. Our laboratory has realized 300-GHz-band transceivers using CMOS technology, including the world’s first terahertz phased-array, pushing the operating frequency limit of CMOS integrated circuits to nearly 300GHz. Currently, we are also conducting research on ultra-high density integration packaging/module technology that can be incorporated into mobile terminals to support even higher speeds, more elements, and lower power consumption.

Millimeter- and terahertz-band radios are a very hot research area, and universities and companies around the world are actively engaged in this research field. Among them, a circuit designed by graduate students in our laboratory has achieved a world-record communication speed of 120 Gbps .

Additionally, we are actively researching wireless technology in the sub-THz band ³ range, especially around 150GHz (D-band), with an aim to practical applications in 6G. Our research has resulted in the world’s first achievement of full-duplex wireless communication at frequencies above 100GHz.

[achivement]

• Tapping into the 300 GHz Band with an Innovative CMOS Transmitter ( ISSCC)

• World’s First Successful High-Speed Data Transmission with Beamforming in 300 GHz Band ()

• Preparing the Stage for 6G: A Fast and Compact Transceiver for Sub-THz Frequencies ( JSSC) ()

• Pushed to the Limit: A CMOS-based transceiver for beyond 5G applications at 300 GHz ( JSSC) ( ISSCC)

• Ultra high-speed IC capable of wireless transmission of 100 gigabits per second in a 300 GHz band ( JSSC) ()

• Speeding up adoption of 5G! Wireless transmission speeds of 120 Gbps achieved ( ISSCC)

• Tokyo Tech and Fujitsu Achieve Wireless Transmission Speeds of 56 Gbps, World’s Fastest ( ISSCC)

We are conducting research on millimeter-wave band satellite communication technology using low earth orbit (LEO) satellites to realize wireless communication technology that can connect anywhere in the world.

Unfortunately, this research topic is not open to international students.

[achivement]

• Towards the New-Space Era with Foldable Phased-Array Transmitters for Small Satellites ()

• New Transmitter Design for Small Satellite Constellations Improves Signal Transmission ( ISSCC)

• Improving the Performance of Satellites in Low Earth Orbit ( ISSCC) ( ISSCC) ( JSSC) ( JSSC)

• Efficient Satellite Downlink with a Ka Band Dual Circular Polarization Transmitter ()

• Greater Connectedness in Remote Areas: A Ka-band Transceiver for Satellite Communications ()

Digital circuits can be automatically generated from HDL (Hardware Description Language), allowing for design reuse across different CMOS technologies and improved performance by using advanced technology. On the other hand, analog circuits require manual design, and there is a significant gap between analog and digital circuits in terms of productivity.

In our research, we are exploring a novel approach to analog circuit technology that enables layout generation through automatic placement and routing while using standard cells commonly used in digital circuits without modification.

As a result, we have successfully implemented phase-locked loop (PLL) circuits using the latest 5nm CMOS technology, which was considered state-of-the-art at the time. This achievement is the result of enabling design by logic synthesis and automatic placement and routing, similar to digital circuits.

[achivement]

• Smallest all-digital circuit opens doors to 5 nm next-gen semiconductor () ()

• Clock generator realized by pure digital circuit ( JSSC) ( ISSCC) ( ISSCC)

• Dual-loop Injection-Locked PLL ( JSSC) ( ISSCC)

We are conducting research on digital PLLs (All-Digital PLLs), in which the control unit is digitalized, rather than conventional PLLs that use charge pumps and analog loop filters. Since analog and digital circuits are mixed, integrated simulation and design techniques that combine analog and digital are required.

In our laboratory, we focus on improving the performance of fractional-N PLLs, which are key devices in wireless communication systems. We are exploring novel circuit designs that leverage discrete-time analog signal processing used in mixed-signal integrated circuits.

We also conduct research on wireless technologies for applications such as BLE (Bluetooth Low Energy) and 5G (FR1).

Among our research achievements, we have developed circuit technologies that expand the theoretical bandwidth limits of conventional PLLs by more than 100 times, and we have realized a fractional-N PLL that operates at a low power consumption of 0.265 µW.

[achivement]

• Combating Fractional Spurs in Phase Locked Loops to Improve Wireless System Performance in Beyond 5G ( ISSCC)

• Novel Architecture Can Reduce Noise-Induced Jitters in Digital Technology ( ISSCC) ( JSSC) ( ISSCC)

• An ultra-low-power frequency synthesizer targeted for IoT devices: Digital PLL achieves a power consumption of 0.265 mW
  ( JSSC) ( ISSCC) ( JSSC) ( ISSCC)

• ADC-based PLL ( JSSC) ( ISSCC)

The Internet of Things (IoT) society is becoming a reality, with sensor nodes mounted on everything and collecting a variety of information via the Internet. It is estimated that the number of sensor nodes will reach one trillion in the future, and reducing the maintenance cost of these nodes is critical to the success of the IoT. To reduce maintenance costs, it is essential to reduce the power consumption of sensor nodes and extend the battery life of the nodes. Our laboratory contributes to the cost improvement of IoT, especially by reducing power consumption of the communication circuits of sensor nodes.

The chip photograph on the left is a transceiver circuit developed in our laboratory for 2.4 GHz Bluetooth Low Energy (BLE). This BLE wireless circuit employs an innovative approach using a single digital phase-locked loop (PLL) circuit to realize all the functions required for wireless communication. This approach significantly reduces the circuitry needed for wireless communication, lowering the power consumption to a world-leading 2.3 mW among BLE wireless circuits.

[achivement]

• Tokyo Tech slashes power consumption in Bluetooth Low-Energy transceiver by more than half ( JSSC) ( ISSCC)

Digital circuits such as CPUs process information as digital values, while most information in the real-world exists in analog form. The bridge between integrated circuits and the real world is formed by Analog-to-Digital Converters (ADC) and Digital-to-Analog Converters (DAC). They are an important analog circuit and are the subject of very active paper presentations at international conferences such as ISSCC.

In our laboratory, we are engaged in the research and development of ADCs and DACs designed using automatic placement and routing techniques, as well as ADCs and DACs designed for Built-In Self-Test (BIST) applications.

Millimeter-wave automotive radar technology has been actively researched and developed for driving safety and convenience, and as an essential technology for autonomous driving. Recently, it is also expected to be applied to in-vehicle sensing, and sensing and imaging in various living environments. In our research laboratory, we are conducting research on a high-precision Frequency-Modulated Continuous-Wave (FMCW) radar using a digital Phase-Locked Loop (PLL) that can be cost-effectively implemented using CMOS integrated circuits.

Expectations are growing for quantum technologies such as quantum computers, quantum sensing, and quantum networks. The practical application of these quantum technologies also requires advanced integrated circuit technology.

In our research laboratory, we are conducting research on highly accurate atomic clocks using Cryo CMOS technology and the transition frequencies of cesium atoms. To incorporate atomic clocks into applications such as automobiles, cellular base stations, and miniaturized satellites, it is essential to significantly reduce the size of traditional atomic clocks and to operate them with extremely limited power are essential.

We have succeeded in developing a 15cm³, 60mW low-power compact atomic clock as shown in the figure on the right, which reduces power consumption and frequency stability by more than an order of magnitude compared to conventional clocks. The realization of miniaturization and low power consumption will enable the use of atomic clocks in various devices, and is expected to be widely deployed in previously unrealized social and technological services, such as automatic driving, GPS replacement, and high-precision measurement.

[achivement]

• Tinier and less power-hungry quantum atomic clock push toward intelligent IoT ( JSSC) ( ISSCC)