visit on 東京科学大学岡田研究室

Prof. Hua Wang

Thu, 29 Jan 2026 15:30:00 +0900

ETH Zurich(スイス連邦工科大学チューリッヒ校)の Hua Wang教授にご講演頂きました。

Speaker: Prof. Hua Wang (ETH, Zurich, Swiss)

Title: AI-Assisted for Radio-Frequency Integrated Circuits at ETH Zurich

Abstract: In recent years, as AI for Science is gaining increasing momentum, there are rapidly growing interest in applying AI tools to facilitate RFIC designs or explore new design spaces. In this seminar talk, I will present a few on-going AI4RF projects at my IDEAS group at ETH Zurich. We will start with our project of AI-assisted template-seeded pixelated design for multi-metal-layer EM structures, which explores a new approach for efficient exploration and exploitation of the design space. Next, we will introduce our transfer learning assisted fast design migration, which potentially enables efficient design migrations over technology nodes and operating frequencies. Finally, we will present out project on top-metal-only RFIC redesigns for fast specs-to-silicon iteration enabled by AI-assisted inverse design. Finally, we will discuss challenges and future directions.

Prof. Mehdi Saligane

Tue, 16 Dec 2025 10:30:00 +0900

Brown University(米ブラウン大学)の Mehdi Saligane先生にご講演頂きました。

Speaker: Prof. Mehdi Saligane (Brown University, USA)

Title: AI for Chips & Chips for AI

Abstract: The exploding scale of modern applications is stretching yesterday’s integrated-circuit (IC) design flows beyond their limits. This talk presents a unified, open, and highly-automated paradigm—AI for Chips & Chips for AI—that simultaneously (i) harnesses artificial intelligence in EDA to build better silicon and (ii) architects silicon that runs AI better.

AI for Chips - Traditional analog layout still relies on expert heuristics. We introduce Agentic-RL gLayout, a goal-conditioned reinforcement-learning agent that replaces hand-tuned placement and routing with policy-driven planning, action, and self-correction. The agent ingests high-level objectives, observes the evolving layout state, and chooses between primitive commands and high-level macros. Positive rewards track goal attainment; penalties capture DRC violations, area bloat, and parasitics, producing cleaner, compact, and rule-compliant layouts without manual intervention. Built atop open-source engines such as OpenROAD, Open Se Cura, and OpenFASoC, the framework pushes layout quality while democratizing access to sophisticated analog design automation. Chips for AI - Conversely, deploying large language model (LLM) workloads at the edge demands silicon tuned for extreme efficiency. We unveil a hardware–software co-design stack centered on ConSmax, a highly parallel, element-wise alternative to Softmax that slashes latency and energy. By co-optimizing network topology, arithmetic precision, and accelerator micro-architecture, the framework meets sub-millisecond deadlines, preserves privacy, and cuts cloud dependence.

Finally, this talk will walk through an open chip design infrastructure augmented with LLM-guided code, circuit, and layout generation that turns hardware creation into a rapid feedback loop, where AI sharpens the EDA tools, while tailored accelerators speed up AI. Closing the “AI-for-chips, chips-for-AI” cycle should make taping-out test chips possible in weeks instead of years, thus propelling the next wave of semiconductor innovation.

Bio: Mehdi Saligane received the B.S. and M.S. degrees in Electrical Engineering Systems and Industrial Computing from École Polytechnique de Grenoble in 2009, and the M.S. Degree in electrical engineering from the University of Grenoble in 2011, and the Ph.D. degree in Electrical Engineering and Computer Science from the University of Aix-Marseille (IM2NP), France, in 2016. From 2010 to 2015, he was part of the Central Research and Development Group at STMicroelectronics in Crolles, France, focusing on adaptive, ultra-low-power digital design. In 2015, he joined the Michigan Integrated Circuit Laboratory at the University of Michigan, Ann Arbor, MI, USA, as a visiting research investigator. In 2019, he served as a Visiting Researcher at the University of California, San Diego, San Diego, CA, USA. He is a founding member of both the OpenROAD and OpenFASOC Projects. Since 2020, he has been a Research Faculty member at the University of Michigan. In 2024, he joined Google Research as a Visiting Faculty Member, and in 2025, he joined Brown University as an Assistant Professor of Electrical and Computer Engineering. His research interests include secure low-power and energy-efficient IC design, Biosensors, analog/mixed-signal design automation and open-source EDA, and custom architectures for lightweight language model accelerators. Dr. Saligane is the recipient of the 2023 Google Cloud Research Innovators Award and the 2021 Google Research Faculty Award. He served in leadership roles at the CHIPS Alliance from 2020 to 2023, including as Chair of the Analog Working Group and as a member of the Technical Steering Committee. Since 2020, he has served on the IEEE Solid-State Circuits Society (SSCS) Open-Source Ecosystem (TC-OSE) Technical Committee and has been the Chair since 2025. In addition, he co-founded and organizes the SSCS Chipathon Design Contest and the SSCS Code-a-Chip Notebook Competition at ISSCC and VLSI Symposium, fostering student engagement with open-source chip design.

Prof. Jeffrey S. Walling

Fri, 14 Nov 2025 16:00:00 +0900

Virginia Tech(バージニア工科大学)の Jeffrey S. Walling教授にご講演頂きました。

Speaker: Prof. Jeffrey S. Walling (Virginia Tech, USA)

Title: Bits-to-Waves: Digital RF, mm-Wave and THz Systems to Enable the Next-G

Abstract: Mixer-based transmitters have been dominant for approximately 100 years. However, for more than a decade RF-DACs have demonstrated the ability to combine the functionality of the DAC, upconverter and amplification stages of a transmitter into a single block. The switched-capacitor power amplifier (SCPA) is a versatile RF-DAC that operates in a voltage mode and uses transistors only as switches. This talk provides a tutorial introduction of the SCPA and presents architectural examples that enable both frequency reconfigurability and operation up to mm-Wave, supporting up to 3Gb/s transmission rates. New uses of algorithmic designs for RF passives will also be introduced.

Speaker Bio: Jeff Walling received his BS from University of South Florida and his MS and PhD from University of Washington, all in Electrical Engineering. He has held industrial positions at Motorola, Intel, Qualcomm and Skyworks. His research has primarily focused on circuits for wireless communications and sensing. From 2012 to 2019, he was an assistant, then associate professor at University of Utah. Then he was head of RF transceivers at Tyndall National Institute in Cork, Ireland. Since 2021, he is an associate professor at Virginia Tech. He has served as an associate editor for TCAS-II, TCAS-I and JSSC, and on the technical program committees of the IEEE RFIC, ISSCC and NEWCAS conferences. He is a senior member of the IEEE and has more than 80 papers in peer reviewed conferences and journals.

Prof. Chung-Tse Michael Wu

Fri, 18 Jul 2025 10:00:00 +0900

国立台湾大学のChung-Tse Michael Wu先生に訪問いただきました！

Prof. Yu-Hsiang Cheng

Wed, 16 Jul 2025 10:00:00 +0900

国立台湾大学のYu-Hsiang Cheng先生に訪問いただきました！

Prof. Mark Rodwell

Tue, 15 Jul 2025 15:00:00 +0900

UCSBのMark Rodwell教授にご講演頂きました！

Lecturer: Prof. Mark Rodwell（University of California, Santa Barbara）

Title: 100-300 GHz Wireless: transistors, ICs, systems

Date & Time: Tuesday, July 15, 2025, 15:45 – 17:30

Abstract: We describe the opportunities, and the research challenges, presented in the development of 100-300GHz wireless communications and imaging systems. In such links, short wavelengths permit massive spatial multiplexing both for network nodes and point-point links, permitting aggregate transmission capacities approaching 1Tb/s. 100-300GHz radar imaging systems can provide thousands of image pixels and sub-degree angular resolution from small apertures, supporting foul-weather driving and aviation. Challenges include the mm-wave IC designs, the physical design of the front-end modules, the complexity of the back-end digital beamformer required for spatial multiplexing, and, for imaging, the development of system architectures requiring far fewer RF channels than the number of image pixels. We will describe transistor development, IC design, and system design, and describe our efforts to develop 140GHz massive MIMO wireless hubs, and 210GHz and 280GHz MIMO backhaul links.

Prof. Hua Wang

Fri, 22 Nov 2024 15:00:00 +0900

ETH(スイス連邦工科大学チューリッヒ校)のHua Wang教授に講演いただきました。

Speaker: Prof. Hua Wang (ETH, Zurich, Swiss)

Title: “Fundamentals of RF and mm-Wave Power Amplifier Designs”

Abstract: This talk presents a focused overview of mm-wave power-amplifier (PA) designs in silicon, including design fundamentals, advanced PA architectures, and state-of-the-art design examples. As phased arrays and MIMO systems have become ubiquitous in various wireless communication and sensing applications, they pose a completely new level of system complexity and different and often tighter requirements on the wireless frontend electronics, in particular the PAs. The talk will start with an introduction of PA performance metrics and their impacts on wireless systems. Next, it presents the design fundamentals of PA active devices and passive networks as well as power combining strategies. The tutorial discusses advanced PA architectures, including Doherty, Outphasing, LMBA, and Coupler-Balun Doherty PAs, for high efficiency, linearity, and bandwidth. Further, advance and challenges of high mm-Wave PAs in large-scaled arrays will be covered to address various emerging wireless applications. Finally, the talk will conclude with several state-of-the-art mm-wave PA design examples.

Prof. Patrick Mercier

Thu, 25 Jul 2024 10:00:00 +0900

カリフォルニア大学サンディエゴ校（UCSD）からのPatrick Mercier教授に東工大に訪問頂き、ご講演くださいました！

Speaker: Prof. Patrick P. Mercier, University of California, San Diego (UCSD)

Title: “Low-Power Standards-Compatible Wireless Communications Circuits for Next-Generation IoT and Wearable Applications”

Abstract:

Emerging Internet-of-Things (IoT) devices for use in smart homes, wearable systems, industrial monitoring, smart cities, and beyond all require robust yet low-power wireless communications. Unfortunately, most current wireless standards do not intrinsically support low-power operation due to strict requirements on modulation formats, data rates, linearity, packet overheads, and so on. These restrictions impose minimum power consumption requirements for cellular standards (e.g., GSM, LTE, and 5G) and WiFi, but also surprisingly limit the ability of supposedly low-power standards (e.g., Bluetooth Low Energy and Narrowband-IoT) from reaching new application-enabling power levels.

This presentation will outline the major challenges facing power reduction in modern wireless systems, and will describe several possible solutions to these challenges. Specifically, we will explore the use of wake-up receivers as a means to reduce the power overhead of between-node synchronization. Then, we will discuss an alternative communication scheme that can help to reduce the power of communication in WiFi, BLE, and body-area-network systems by >1,000x through use of standards-compatible backscatter communication systems, including the latest developments incorporating retroreflection and beam steering. We will also discuss related sensing circuit opportunities to round out the application space.

Prof. Wei Deng and Prof. Xiang Gao

Thu, 02 May 2024 21:24:47 +0900

清華大のWei Deng先生(SSCS DL)と浙江大学のXiang Gao先生が、東工大を訪問されました。

5/2(木) 15:30-16:30 Prof. Wei Deng (SSCS DL講演会)

“Joint Radar-communication CMOS Transceiver”

16:30-17:30 Prof. Xiang Gao

“Frac-N Sampling PLL with Phase Detection and Quantization Noise Cancellation in a Single Ramp Generation”

★各講演の詳細

(Talk 1) Speaker: Prof. Wei Deng (Tsinghua University)

Title: Joint Radar-communication CMOS Transceiver: From System Architecture to Circuit Design

Abstract: Recent years, millimeter-wave and Terahertz radar systems for sensing and radio systems for communication have attracted substantial attention both from the academia and industry. In addition, there is an increasing demanding for fusing both the hardware platform and frequency band of the radar and radio system, which has advantages of energy efficiency, performance optimization, spectrum sharing/efficiency, compact size, interference management, and the overall cost, as compared to assembling of two distinct systems. This lecture will introduce the current and future trends in the emerging joint radar-communication CMOS transceiver from system architecture to circuit design.

Bio: Wei Deng received the B.S. and M.S. degrees from the University of Electronic Science and Technology of China (UESTC), China, in 2006 and 2009, respectively, and the Ph.D. degree from the Tokyo Institute of Technology, Japan, in 2013. He was with Apple Inc., Cupertino, CA, USA, working on RF, mm-wave, and mixed-signal IC design for wireless transceivers and Apple A-series processors. Currently he is with Tsinghua University, Beijing, China, as an Associate Professor. His research interests include RF, mm-wave, terahertz, and mixed-signal integrated circuits and systems for wireless communications, sensing, and imaging systems. He has authored or co-authored more than 160 IEEE journal and conference articles. Dr. Deng is a TPC Member of ISSCC, VLSI, A-SSCC, CICC and ESSCIRC. He has been an Associate Editor and a Guest Editor of the IEEE Solid-State Circuits Letters (SSC-L), a Guest Editor of the IEEE Journal of Solid-state Circuits (JSSC), and a Distinguished Lecturer of the IEEE Solid-State Circuits Society (SSCS).

(Talk 2) Speaker: Prof. Xiang Gao (Zhejiang University)

Title: Frac-N Sampling PLL with Phase Detection and Quantization Noise Cancellation in a Single Ramp Generation

Abstract: Conventional PLLs detecting phase error in the time domain using a phase frequency detector often suffer from poor in-band phase noise due to the limited phase detector (PD) gain. The (Sub-)Sampling PLL is becoming a popular low jitter PLL architecture due to high gain of the SSPD. However, the high gain SSPD has a limited linear detection range, which is a challenge in fractional-N operation with the quantization noise. This talk presents a SPLL design with a merged constant-slope digital-to-time converter(DTC) and sampling phase detector (CSDTC-SPD). It realizes phase detection as well as quantization noise cancellation in a single ramp generation.

Bio: Xiang Gao received the B.E. degree from the Zhejiang University, Hangzhou, China, in 2004 and the M.Sc. and Ph.D. (cum laude) degrees from the University of Twente, Enschede, The Netherlands, in 2006 and 2010 respectively, both in electrical engineering. From 2010 to 2016, he was a principal engineer and design manager with Marvell Semiconductor, Santa Clara, CA, focusing on analog and RF IC design for wireless transceivers. From 2016 to 2018, he was an Engineering Director with Credo Semiconductor, Milpitas, CA, working on high-speed SerDes. Since August 2018, he has been a Faculty member at Institute of VLSI Design, Zhejiang University, China. He is an IEEE senior member, and TPC member of RFIC(2014-current)、CICC(2016-2023) and ISSCC(2015-2019, 2024-current).

Prof. Vadim Issakov

Thu, 28 Mar 2024 14:28:20 +0900

3/28に、IEEE MTT-S Japan/Kansai/Nagoya Chapterの主催で、DML講演会(Distinguished Microwave Lecture)が開催され、ブラウンシュヴァイク工科大学(Technische Universität Braunschweig)のProf.Vadim Issakov先生に、ミリ波レーダーの研究についてご講演頂きました。

Prof. Vadim Issakov

Tue, 21 Nov 2023 17:02:18 +0900

11/21 ブラウンシュヴァイク工科大学(Technische Universität Braunschweig)のProf.Vadim Issakov先生が東工大に訪問され、最新の研究内容についてご講演頂きました．

Prof. Inchan Ju

Tue, 26 Sep 2023 12:01:41 +0000

Prof. Inchan Ju先生に訪問いただきました！

Prof. Bogdan Staszewski

Fri, 09 Jun 2023 06:00:00 +0000

6/9、University College DublinのBogdan Staszewski先生が東工大に訪問され、最新の研究内容についてご講演頂きました．

Prof. Kenneth O

Wed, 07 Jun 2023 02:47:58 +0000

6/7、テキサス大学ダラス校のKenneth O先生が東工大に訪問され、最新の研究内容についてご講演頂きました

Dr. Bodhisatwa Sadhu

Mon, 17 Apr 2023 20:00:00 +0000

IBMのDr. Bodhisatwa Sadhu氏に講演頂きました。

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Dr. Bodhisatwa Sadhu

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Prof. Donald Lie

Wed, 29 Mar 2023 10:12:21 +0000

3/29、テキサス工科大学のDonald Lie先生が東工大に訪問され、最新の研究内容についてご講演頂きました。

Prof. Emanuel Cohen

Mon, 28 Nov 2022 16:13:44 +0000

11/29、Emanuel Cohen先生が東工大に訪問され、最新の研究内容についてご講演頂きました．

Prof. Fa Dai

Fri, 08 Nov 2019 15:33:55 +0000

Prof. Fa Dai, South China University of Technology (SCUT), came to our lab at November 8th, 2019! Welcome!!!

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Prof. Tsung-Hsien Lin

Tue, 29 Oct 2019 15:32:00 +0000

Prof. Tsung-Hsien Lin, National Taiwan University (NTU), came to our lab at October 25th, 2019!

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Prof. Kofi Makinwa

Thu, 01 Aug 2019 16:00:40 +0000

Prof. Kofi Makinwa, TU Delft, came to our lab!!

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Prof. Nan SUN

Mon, 17 Jun 2019 23:52:00 +0000

Great talk from Prof. Nan SUN, UT Austin! New Ingredients in the Pot - Rethink Analog IC Design -

Prof. Omeed Momeni

Thu, 08 Nov 2018 13:40:09 +0000

Prof. Omeed Momeni（University of California, Davis ) visited our lab! He is very famous for mm-Wave and Terahertz Signal Generation, Amplification, and Beam Steering in Silicon.

Prof. Pietro Andreani

Tue, 02 Oct 2018 16:32:08 +0000

Prof. Pietro Andreani（Lund University) visited our lab! He is very famous for VCO design.

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Prof. R. Bogdan Staszewski

Tue, 17 Jul 2018 14:43:31 +0000

Prof. R. Bogdan Staszewski from University College Dublin visited our Lab. on Saturday, July 14. He gave a seminar about AD-PLL.

The seminar from Prof. R. Bogdan Staszewski.

End Session Group Photo with Prof. R. Bogdan Staszewski.

Prof. Flynn

Thu, 16 Nov 2017 19:12:45 +0000

Prof. Flynn（University of Michigan) visited our lab! He is very famous for ADC design.

Prof. Patrick Yue

Tue, 03 Oct 2017 06:21:03 +0000

Prof. Patrick Yue (HKUST) visited our labHe is very famous for VLC and gave a talk about this!

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Prof. Huei Wang

Fri, 19 May 2017 23:03:51 +0000

Prof. Huei Wang (National Taiwan University) visited our lab!

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He is very famous for CMOS RFIC design, but this time he gave a talk about “Harmonic Radar Development for Bee Searching”!

Prof. Salvatore Levantino

Tue, 17 Jan 2017 15:00:00 +0900

Prof. Salvatore Levantino visited our lab!

Prof. Seung-Tak Ryu

Wed, 16 Nov 2016 22:40:03 +0000

Prof. Seung-Tak Ryu, KAIST, visited our laboratory!

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Prof. Chi-Hang Chan, Ivor

Fri, 11 Nov 2016 02:23:12 +0000

Macau大学のProf. Chi-Hang Chan (Ivor)先生が訪問されました！講演もして頂きました！Design Techniques and Considerations in Power-efficient High Speed ADCs

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Dr. Andreia Cathelin

Wed, 20 Jan 2016 20:49:01 +0000

STのAndreia Cathelin氏に講演頂きました。

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Prof. Mehmet Unlu

Mon, 28 Sep 2015 21:57:31 +0000

Prof. Mehmet Unlu visited our laboratory.

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visit on 東京科学大学 岡田研究室

Prof. Hua Wang

Prof. Mehdi Saligane

Prof. Jeffrey S. Walling

Prof. Chung-Tse Michael Wu

Prof. Yu-Hsiang Cheng

Prof. Mark Rodwell

Prof. Hua Wang

Prof. Patrick Mercier

Prof. Wei Deng and Prof. Xiang Gao

Prof. Vadim Issakov

Prof. Vadim Issakov

Prof. Inchan Ju

Prof. Bogdan Staszewski

Prof. Kenneth O

Dr. Bodhisatwa Sadhu

Prof. Donald Lie

Prof. Emanuel Cohen

Prof. Fa Dai

Prof. Tsung-Hsien Lin

Prof. Kofi Makinwa

Prof. Nan SUN

Prof. Omeed Momeni

Prof. Pietro Andreani

Prof. R. Bogdan Staszewski

Prof. Flynn

Prof. Patrick Yue

Prof. Huei Wang

Prof. Salvatore Levantino

Prof. Seung-Tak Ryu

Prof. Chi-Hang Chan, Ivor

Dr. Andreia Cathelin

Prof. Mehmet Unlu

visit on 東京科学大学岡田研究室